Is it possible to have something even close to an answer on this forum?
If you set ODR to 1600 Hz, FIFO cannot be read out in time and will soon be full.
This example demonstrates the use of FIFO when using 100 Hz ODR. https://github.com/BoschSensortec/BMA456-Sensor-API/blob/master/examples/bma456/generic/fifo_waterma...
Thanks for the reply.
I have no problem reading the FIFO at 1600Hz, i'm running the SPI at 8 MHz and reading the fifo every 40 ms, 64 samples.
Like I said before i would like to use the fifo_err flag to determine if for some reason the fifo overflowed but is doesn't seem to work.
Is it possible that this function is available only when the ASIC is initialized?
You could see the following description in data sheet, FIFO_CONFIG_0.fifo_stop_on_full was used for FIFO overflow. If the FIFO overflows, the INT_STATUS_1.fful_int flag bit will be set to 1.
If the rate of reading FIFO is lower than that of filling FIFO, ERR_REG.fifo_err flag will be set to 1.