BMA456 sends multiple fifo interrupt (BMA4_FIFO_WM_INT)

[david_cy_kao]

Refer sample code (bma456an_examples/fifo_watermark_headerless_mode/)
BMA456-Sensor-API/fifo_watermark_headerless_mode.c at master · boschsensortec/BMA456-Sensor-API · Gi...

I use the below setting to enable the BMA456 fifo interrupt:
// Set Accel Config (0x40)
bma456_cfg.bandwidth = BMA4_ACCEL_NORMAL_AVG4;
bma456_cfg.odr = BMA4_OUTPUT_DATA_RATE_50HZ;
bma456_cfg.perf_mode = BMA4_CONTINUOUS_MODE;
bma456_cfg.range = BMA4_ACCEL_RANGE_2G;
rslt = bma4_set_accel_config(&bma456_cfg, &bma456_dev);

// Enable the accelerometer
rslt = bma4_set_accel_enable(BMA4_ENABLE, &bma456_dev);
//Clear FIFO configuration register
rslt = bma4_set_fifo_config(BMA4_FIFO_HEADER ,BMA4_DISABLE, &bma456_dev);

// Configure Interrupts
struct bma4_int_pin_config int_pin_config;
int_pin_config.edge_ctrl = BMA4_LEVEL_TRIGGER;
int_pin_config.input_en = BMA4_INPUT_DISABLE;
int_pin_config.lvl = BMA4_ACTIVE_HIGH;
int_pin_config.od = BMA4_PUSH_PULL;
int_pin_config.output_en = BMA4_OUTPUT_ENABLE;
bma4_set_int_pin_config(&int_pin_config, BMA4_INTR1_MAP, &bma456_dev);

// Map INT1 Interrupt to FIFO_WM_INT
rslt = bma4_map_interrupt(BMA4_INTR1_MAP, BMA4_FIFO_WM_INT, BMA4_ENABLE, &bma456_dev);

//SET watermark
rslt = bma4_set_fifo_wm(BMA_FIFO_WATERMARK, &bma456_dev);

// Enable the accelerometer FIFO
rslt = bma4_set_fifo_config(BMA4_FIFO_ACCEL, BMA4_ENABLE, &bma456_dev);

When my device receives interrupt, it will read the int_status and the fifo buffer frame. I suppose the interrupt is received 50 samples (300 bytes) every 1 second (due to the ODR is set to 50Hz). But the log shows the device receives 2 interrupts:
- 1st interrupt: status is 0200 (fwm_int)
- 2nd interrupt: statis is 0000

I also check interrupt regster:
0x53: 0A
0x54: 00
0x58: 02

== log ==
[06/03/23 - 17:19:54:819] BMA__IRQ
[06/03/23 - 17:19:54:822] int_status: 0200
[06/03/23 - 17:19:54:839] FIFO data bytes available : 300
[06/03/23 - 17:19:54:872] Parsed accelerometer data frames: length = 50
[06/03/23 - 17:19:54:886] BMA__IRQ
[06/03/23 - 17:19:54:886] int_status: 0000
[06/03/23 - 17:19:54:894] FIFO data bytes available : 24
[06/03/23 - 17:19:54:919] Parsed accelerometer data frames: length = 4
[06/03/23 - 17:19:55:880] BMA__IRQ
[06/03/23 - 17:19:55:886] int_status: 0200
[06/03/23 - 17:19:55:899] FIFO data bytes available : 300
[06/03/23 - 17:19:55:936] Parsed accelerometer data frames: length = 50
[06/03/23 - 17:19:55:949] BMA__IRQ
[06/03/23 - 17:19:55:949] int_status: 0000
[06/03/23 - 17:19:55:956] FIFO data bytes available : 24
[06/03/23 - 17:19:55:980] Parsed accelerometer data frames: length = 4

May you kindly help to check the code flow and the log, provide us the possible reason why there is another interrupt (0000)? Is there any method to avoid it? Thanks

[BSTRobin · Accepted solution]

Hi david_cy_kao,

Run the example code on STM32 with 50 Hz ODR, couldn't reproduce that host receive 2 interrupts.

I attached example code for your reference.

[david_cy_kao]

Thanks for the example code and the information. After checking the code, the configuration and flow are the same but I still see these irq.  It may be the HW issue and I now test with HW guys. Once we have any furthur anslysis, I will update the information.

[BSTRobin]

Hi david_cy_kao,

Ok. Interrupt function on host side also should be checked.

[jwhistle]

Hi we are having the same issue.

We set the watermark samples to 100. First fifo interrupt we read 100 samples but then 10 millisec later we get another interrupt with only  a few samples.

It should not be happening so fast. We are using example code from bma456.