BNO055 and Attiny817 I2C communication

[Cos_j]

Hi,

I have some wierd issues with getting readings from the BNO055 sensor using an atmel attiny 817 mcu.

Whenever i start reading the sensor data from 1A the operation  mode mysteriously turns back to config mode and all I get is 0.

here is my code:

bool check_connection(){
	while (1) {
		if (I2C_0_read1ByteRegister(0x28, 0x00) == 0xA0)
			return true;
		else
			 return false;
	}
}

void setup_imu(){
	
	


	// set operating mode: config.
	I2C_0_write1ByteRegister(0x28, 0x3D, 0x00);
	_delay_ms(20);
	
	  /* Set to normal power mode */
	I2C_0_write1ByteRegister(0x28, 0x3E, 0x00);

	// switch to register page 0
	I2C_0_write1ByteRegister(0x28, 0x07, 0x00);

	// run self test
	I2C_0_write1ByteRegister(0x28, 0x3F, 0x00);

	
	// read self test.
	I2C_0_read1ByteRegister(0x28, 0x36); // pass if 0x0F

	//activate external crystal
	I2C_0_write1ByteRegister(0x28, 0x3F, 0x80);

	// set operating mode: OPERATION_MODE_NDOF. 
	I2C_0_write1ByteRegister(0x28, 0x3D, 0x0C);
	_delay_ms(20);
	
	
	
}

void getData(){
	
	
	
I2C_0_read1ByteRegister(0x28, 0x3D);
	I2C_0_readDataBlock(0x28,0x1A,data,6);

	printf("data> %x \r\n", data[0]);

}
int main(void)
{
	memset (data, 0, 6);
	/* Initializes MCU, drivers and middleware */
	atmel_start_init();
	ENABLE_INTERRUPTS();
	/* Replace with your application code */
	
	
	_delay_ms(500);
	while (!check_connection());
		
	setup_imu();
	while (1) {
		
		getData();
		_delay_ms(1000);						
	}
}

and here is the i2c communication (marked with where the change happens):

Start, Error!!! Stop
Error!!!
Error!!!
Error!!!
Error!!!
Start, h50 [ h28 | WR ], h00,
Restart, h51 [ h28 | RD ], hA0 NAK,
Restart, h50 [ h28 | WR ], h3D, h00, Stop
Error!!!
Start, h50 [ h28 | WR ], h3E, h00, Stop
Error!!!
Start, h50 [ h28 | WR ], h07, h00, Stop
Error!!!
Start, h50 [ h28 | WR ], h3F, h00, Stop
Error!!!
Start, h50 [ h28 | WR ], h36,
Restart, h51 [ h28 | RD ], h0F NAK, Error!!! Stop
Error!!!
Start, h50 [ h28 | WR ], h3F, h80, Stop
Error!!!
Start, h50 [ h28 | WR ], h3D, h0C, Stop
Error!!!
Start, h50 [ h28 | WR ], h3D,
Restart, h51 [ h28 | RD ], h0C NAK, Error!!! Stop
Error!!!
Start, h50 [ h28 | WR ], h1A,
Restart, h51 [ h28 | RD ], h00, h00, h00, h00, h00, h00 NAK, Error!!! Stop
Error!!!
Start, h50 [ h28 | WR ], h3D,
Restart, h51 [ h28 | RD ], h0C NAK, Error!!! Stop
Error!!!
Start, h50 [ h28 | WR ], h1A,
Restart, h51 [ h28 | RD ], h00, h00, h08, h00, h2B, h00 NAK, Error!!! Stop
Error!!!
Start, h50 [ h28 | WR ], h3D,
Restart, h51 [ h28 | RD ], h00 NAK, Error!!! Stop
Error!!!
Start, h50 [ h28 | WR ], h1A,
Restart, h51 [ h28 | RD ], h00, h00, h00, h00, h00, h00 NAK, Error!!! Stop
Error!!!
Start, h50 [ h28 | WR ], h3D,
Restart, h51 [ h28 | RD ], h00 NAK, Error!!! Stop
Error!!!
Start, h50 [ h28 | WR ], h1A,
Restart, h51 [ h28 | RD ], h00, h00, h00, h00, h00, h00 NAK, Error!!! Stop
Error!!!
Start, h50 [ h28 | WR ], h3D,
Restart, h51 [ h28 | RD ], h00 NAK, Error!!! Stop
Error!!!
Start, h50 [ h28 | WR ], h1A,
Restart, h51 [ h28 | RD ], h00, h00, h00, h00, h00, h00 NAK, Error!!! Stop
Error!!!
Start, h50 [ h28 | WR ], h3D,
Restart, h51 [ h28 | RD ], h00 NAK, Error!!! Stop
Error!!!
Start, h50 [ h28 | WR ], h1A,
Restart, h51 [ h28 | RD ], h00, h00, h00, h00, h00, h00 NAK, Error!!! Stop
Error!!!
Start, h50 [ h28 | WR ], h3D,
Restart, h51 [ h28 | RD ], h00 NAK, Error!!! Stop
Error!!!
Start, h50 [ h28 | WR ], h1A,
Restart, h51 [ h28 | RD ], h00, h00, h00, h00, h00, h00 NAK, Error!!! Stop

[o_o]

your I2C seems to have a lot of error. The beginning caught my attention:

Start, h50 [ h28 | WR ], h00,
Restart, h51 [ h28 | RD ], hA0 NAK,
Restart, h50 [ h28 | WR ], h3D, h00, Stop
Error!!!

There is a double i2c restart. I do not believe that the protocol allows for this. It should be one of these cases:
1: Start -> WADDR -> ACK -> REG -> ACK -> RESTART -> RADDR -> DATA [ -> ACK -> DATA ]*n -> NACK -> STOP
2: Start -> WADDR -> ACK -> REG -> ACK-> STOP -> START -> RADDR -> DATA [ -> ACK -> DATA ]*n -> NACK -> STOP
3: Start -> WADDR -> ACK -> REG -> ACK -> DATA [ -> ACK -> DATA ]*n -> ACK -> STOP

Does you host configuration support clock streching ?