I'm trying to resolve a persistent issue I'm having with a BNO055 IMU on a custom PCBA. I'm communicating via I2C and am experiencing different behavior between device reset (using "Power on Reset" reset pin) with and without power cycling. In situations where I reprogram my MCU and start directly into my application code without power cycling, the IMU will respond with NAKs to any and all read/write messages. If I power-cycle the system, it works correctly. In both scenarios I'm pulling the reset pin low for ~25ms, pulling the reset pin high, and then waiting for ~725ms before initiating I2C communication. All other signals (COM1, COM2, PS0, PS1, nBOOT_LOAD_PIN) are connected to VDD or GND directly or through a 10kΩ resistor. A partial schematic is attached.
The firmware is heavily based upon the BNO055 XPlained Pro example code and is being run on a SAMD21G18A.
Can you help me to understand the differences in behavior between device reset for the BNO055 from an 'unknown' state and from a power-on state? Do I need to set the SDA/SCL lines to a certain level before/during/after Power on Reset?
Attached are logic analyzer screenshots of the system failing without power cycle (BNO055_noPowerCycle.png) and working with power cycle (BNO055_withPowerCycle.png), as well as a partial schematic (BNO055_sch.png).
Hi, we've updated our design based on your feedback and wanted to know if our new BNO055 design is valid.
We've added some circuitry to be able to change between I2C or UART mode using a GPIO from our MCU (notes in schematic).
We've added more capacitance as you suggested and added an external crystal to mitigate the power on reset issue.
Any feedback on our new design would be greatly appreciated.