I am trying to fit the BSEC library on an MSP430FR with 64K FERAM and 2K RAM.
According to the size specifications of the BSEC library it should fit, but I cannot find a way to do it.
The library is compiled with the small model, so it is possible to use only the lower 46K of the available FERAM, but it should fit anyway.
The requirements should be 32K/1K and at the moment I havo no other code but the BSEC and BME680 driver code.
I am using the gcc compiler (GNU 18.104.22.168 Mitto System) inside the CCS from ti, and I always have many errors like: `.text' will not fit in region `ROM'
Can someone help me?
Solved! Go to Solution.
Note that the BSEC library depends on additional libraries like the math library. One can swap out the standard math library with third-party libraries that offer a smaller code size at the cost of precision. In case this is not an option, we also offer a BSEC lite version which is a subset of BSEC library with reduced code size & memory requirements. It does not include functions to save the state of BSEC, if the device powers down.
Thank you for your answer.
I tryed also the lite version, but the combination of bsec library, bme680 driver, math and standard library and a small main that calls few functions (bsec_integration.c), results in the following sizes:
Full version 70'521 bytes
Lite version 58'603 bytes
The problem is that the bsec library is compiled with the small model, and thus it can use only the feram portion below 64K
Unfortunately even with a 64K or more processor, the available memory below 64K is about 46K, so I don't understand how it is ever possible to fit the library in this processor family (MSP430FRxxxx).
Do you have any suggestion?
Or, maybe a version of the library built using the large model?
Can you elaborate on your comment, Or, maybe a version of the library built using the large model?
We have 2 deliveries at the moment as you have already tried. An alternative would be to check if you already have code size optimization switched on and enable additional options to compress the rest of the code you already use.
Sorry for the late reply.
The memory of the MSP430 is always divided into a low bank up to 64K where there is also the RAM and most peripherals, and an upper bank above 64K.
The lower bank is about 40K, not enough to store the library alone, and part of the bank is dedicated to interrupt vectors and startup code.
To access the upper bank you need addresses of 17 bit (actually 24) and all the code must be compiled in the so called "large model".
So the point that the full library cannot fit into neither the lower bank, nor the upper bank, whatever size my code is, unless it is modulare and compiled in lasge model, so can stay in the lower bank overflowing to the upper bank.
Hope this clarify the question.