Thanks again for your answer, I think it has become much clearer to me how the interrupt engine works while the decivce is in lowpower mode. Maybe one or two more questions will bring me to the solution of my problem. I'm less interested in the continuously generated data, and more interested in the information about the event that led to the interrupt If I were to run the device in event-driven sleep mode (EDT) instead of EST and a high-G interrupt occurred, would any data regarding that interrupt be stored in the FIFO so that the host microcontroller could access it to get not only the information that an interrupt occurred, but also the value above the threshold?
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