About tonyh

Root cause found as we tried the same config with ESP. Here are two screencaptures of reset-command, upper nrf52 (fails), lower ESP (works). Nrf52 sends device address before data and BHI160 might not recognize even the reset cmd as INT won't go low. Now have to find how I can get nrf52 I2C to make similar sequences than ESP. 😑 ... View more

  Just soldered more measurement pins. Seems that BHI160 starts some I2C activity to BMM150 direction when INT goes low. Big picture of FW upload, upper I2C is from nrf52<->BHI160, lower I2C is between BHI160<->BMM150. I2C between BHI160<->BMM150 zoomed in. Bus is running @88kHz and its seems scanning something, leading always to NAK. According to our understanding BMM150 I2C address is 0x10. Does this giving any glue? ... View more

The i2c-write method (.bus_write) is matching 1:1 to Zephyr's API: https://docs.zephyrproject.org/apidoc/latest/group__i2c__interface_gaf995812f31e7bf1ea7f203905db13822.html Here is the begin of FW upload. Are these byte orders as expected? I also pasted the begin of FW array. const unsigned char bhy1_fw[] = {   0x2a, 0x65, 0x00, 0x1a, 0x9a, 0x31, 0x1b, 0xe7, 0x00, 0x00, 0x00, 0x00,   0x74, 0x28, 0x00, 0x00, 0xe8, 0x99, 0x7f, 0x00, 0x44, 0x19, 0x00, 0x00,   0x68, 0x8d, 0x7f, 0x00, 0x4a, 0x26, 0x00, 0x70, 0x4a, 0x26, 0x00, 0x70,   0x4a, 0x26, 0x00, 0x70, 0x4a, 0x26, 0x00, 0x70, 0x4a, 0x26, 0x00, 0x70,   0x4a, 0x26, 0x00, 0x70, 0x4a, 0x26, 0x00, 0x70, 0x4a, 0x26, 0x00, 0x70,   0x4a, 0x26, 0x00, 0x70, 0x4a, 0x26, 0x00, 0x70, 0x4a, 0x26, 0x00, 0x70, ... View more

What I have analyzed the transmission with bus logic analyzer, there is no problems with current transmission lengths (32 bytes), 32 byte transmissions are fine. I imported screenshots of begin and end of the transmissions if you want to check. Is there possible to detect if BHI160 didn't read the FW properly? Is CRC = 0xFFFFFFFF meaning that any byte didn't read properly? Why INT happens if FW upload is not finished? ... View more