The function
"static int8_t config_low_g_int_settg(const struct bmi160_acc_low_g_int_cfg low_g_int, const struct bmi160_dev dev)"
function modifies the reserved bit (1 << 2) of register 0x5C:
/* Adding low-mode */
data_array[2] = temp | ((low_g_int->low_mode << 2) & BMI160_LOW_G_LOW_MODE_MASK);
@file bmi160_defs.h
@date 2021-10-05
@version v3.9.2
/*!
* @brief This API configure the necessary setting of low-g interrupt.
*/
static int8_t config_low_g_int_settg(const struct bmi160_acc_low_g_int_cfg low_g_int, const struct bmi160_dev dev)
{
int8_t rslt;
uint8_t temp = 0;
uint8_t data_array[3] = { 0, 0, 0 };
/* Configuring INT_LOWHIGH register for low-g interrupt */
rslt = bmi160_get_regs(BMI160_INT_LOWHIGH_2_ADDR, &data_array[2], 1, dev);
if (rslt == BMI160_OK)
{
temp = data_array[2] & ~BMI160_LOW_G_HYST_MASK;
/* Adding low-g hysteresis */
data_array[2] = temp | (low_g_int->low_hyst & BMI160_LOW_G_HYST_MASK);
temp = data_array[2] & ~BMI160_LOW_G_LOW_MODE_MASK;
/* Adding low-mode */
data_array[2] = temp | ((low_g_int->low_mode << 2) & BMI160_LOW_G_LOW_MODE_MASK);
/* Adding low-g threshold */
data_array[1] = low_g_int->low_thres;
/* Adding low-g interrupt delay */
data_array[0] = low_g_int->low_dur;
/* Writing data to INT_LOWHIGH 0,1,2 registers simultaneously*/
rslt = bmi160_set_regs(BMI160_INT_LOWHIGH_0_ADDR, data_array, 3, dev);
}
return rslt;
}
in the API, "low_g_int->low_mode" is described as:
/*! 0 - single-axis mode ,1 - axis-summing mode */
uint8_t low_mode : 1;
but there is no information about the mode selection in the datasheet (0 - single-axis mode ,1 - axis-summing mode) and the bit modified by the function is a reserved bit in the 0x5C register.
Please explain whether the API (version: v3.9.2, date: 2021-10-05) contains a bug or the BMI160 documentation (Document revision: 1.0 Document release date: November 25th 2020 Document number: BST-BMI160-DS000-09 Technical reference code(s): 0 273 141 187) contains a bug.
Is there an erratum for the BMI160 system? If so, where can I find it?