01-23-2024 08:13 AM
Setup is BHI260AP using standard BHI260AP.fw.h firmware with the standard boilerplate configuration code. Everything works as expected except that no matter what I do via the bhy2_set_host_interrupt_ctrl() setup, edge or levels, the HIRQ pin remains high. Even if I flush all the FIFOs, the HIRQ remains high. It's as though it's still a GPIO input.
Is there something obvious I'm missing in the configuration?
Is there any way to test toggling the HIRQ pin?
Is there any special firmware that can configure the pin as output low?
01-23-2024 08:57 AM
Hi grm,
You can use a logic analyzer to capture the changes in interrupt pin after power on. The interrupt pin is triggered by the rising edge and defaults to a low level.
Have you correctly configured the interrupt function and service program on the host side? You should read FIFO instead of flush FIFO.
01-24-2024 12:00 AM
Yes, I've tried all the above. Is there a backdor way I can toggle GPIO0 as an output or create a simple firmware file that just makes GPIO0 a low output?
03-08-2024 08:52 AM