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    bma456 - headerless watermark mode

    bma456 - headerless watermark mode

    TMunb
    New Poster


    hi Bosch,

    I have a BMA456 accelerometer connected to an STM32 micro via I2C.

    Based on your BMA456-Sensor-API examples I see the following:

    accelerometer.c:
    in this example are included both sensor initialisation and writing of the config file ...

    /* Sensor initialization */
    rslt = bma456_init(&bma);
    /* Upload the configuration file to enable the features of the sensor. */
    rslt = bma456_write_config_file(&bma);

    Further below int1 is mapped, and when the interrupt status indicates data is ready the data is read ...

    /* Mapping data ready interrupt with interrupt pin 1 to get interrupt status once getting new accel data */
    rslt = bma456_map_interrupt(BMA4_INTR1_MAP, BMA4_DATA_RDY_INT, BMA4_ENABLE, &bma);

    while (1)
    {
    /* Read interrupt status */
    rslt = bma456_read_int_status(&int_status, &bma);
    /* Filtering only the accel data ready interrupt */
    if ((rslt == BMA4_OK) && (int_status & BMA4_ACCEL_DATA_RDY_INT))
    {
    /* Read the accel x, y, z data */
    rslt = bma4_read_accel_xyz(&sens_data, &bma);

    Is there a specification in the datasheet or elsewhere indicating how much time will be taken for the interrupt to indicate that data is ready ? Is it basically governed only by the odr setting, in this case 50Hz, and the number of samples so 1/50 x 3 = 60ms ?

    The above code seems to work well in our application (once I change BMA4_I2C_ADDR_PRIMARY UINT8_C(0x18) to BMA4_I2C_ADDR_PRIMARY UINT8_C(0x18<<1) ) although it's actually headerless watermark mode which is more applicable for our product.

    fifo_watermark_headerless_mode.c:
    now using this example we note sensor initialisation is still used, but not the writing of the config file ...

    /* Initialize BMA456 */
    rslt = bma456_init(&dev);

    Why is writing of the config file not used in this example ? Should I manually add this so that it appears as in accelerometer.c ? I've tried this example with and without writing of the config file, and it doesn't seem to make a difference hence would like to know which is correct and why, please ?

    As with the first example is there a way to calculate in this headerless watermark mode example how much time is needed for the device to prepare the samples and indicate completiong via int1 ? Now with odr = 100Hz would it be 1/100 x 100 samples = 1 second ?

    And at what point in this code example does the BMA456 begin the process of collecting the samples (100 samples, so 100x6 = 600 which is the watermark level set in the code) ? Or is the device continually recording samples and storing these in its FIFO, but just asserting int1 once 600 has been reached after which it continues to collect and record more samples ?

    I'm not properly understanding the watermark mode of operation, so can you help me to understand a little better, please ? I know the FIFO is 1024 bytes in total, and in this example watermark is set to 600 (which in headerless mode equates to 100 samples of x, y, and z because 600 / 6 = 100, and each sample group of x, y, and z is 3 x 2 bytes). Assuming the device begins filling its internal memory at "address 0" and continues until "address 1023" then is it true to say it will assert the mapped interrupt, in this case int1, when it reaches "address 599" ? Does it then continue filling memory upto "address 1023" but then assert int1 again (assuming it remains in the same mode) when it again reaches "address 599" ? Or does this all depend on the FIFO overflow setting ? So if I choose BMA4_FIFO_STOP_ON_FULL then will it stop sampling and filling the FIFO once it reaches "address 1023" ? And if this setting is not chosen will it continually sample and record going back to the start of FIFO after reaching the full mark ?

    The bandwidth setting in the example is BMA4_ACCEL_NORMAL_AVG4 so does that mean each sample finally read, after int1 is asserted, is actually the average of 4 samples ? How does this setting affect my calculated duration, above, of 1 second ? This is I believe with acc_perf_mode choosing cic_avg/averaging mode. If instead I set acc_perf_mode to continous filter function mode does this mean each and every sample is just the first raw value meaning without any averaging applied ? And then is this identical to remaining in averaging mode, but with an acc_bwp setting of BMA4_ACCEL_OSR4_AVG1 ?

    This code example includes the following comment:

    /* Disabling advance power save mode as FIFO data is not accessible in advance low power mode */
    rslt = bma4_set_advance_power_save(BMA4_DISABLE, &dev);

    The datasheet describes bit fifo_self_wakeup and states that with this bit set "FIFO read enabled after interrupt in advanced power saving mode". Does this mean that in your example advanced power save mode could've been employed throughout the time the device was sampling and recording these accelerometer values to its FIFO, but that we would then need to exit this low power mode to actually read the values from FIFO ? The datasheet actually states "The sensors log data into the FIFO in performance and low power mode (by low power mode do they also mean advanced power save mode ?) . When the FIFO watermark interrupt is active (it is in this example), the FIFO is accessible for reading in low power mode until a burst read operation on Register FIFO_DATA completes when PWR_CONF.fifo_self_wakeup=0b1". Once int1 has been asserted I believe this example does complete such a burst read on FIFO_DATA, using bma4_read_fifo_data(), so does this mean the entire process can be performed in advanced power saving mode ?

    6 REPLIES 6


    Thanks BSTRobin.

    Just to clarify ...

    1/ you wrote that the configuration file is recommended to be loaded, by default, but is it required ? As mentioned I'm using the BMA456 FIFO/watermark/interrupt functionality and if the config file isn't actually required for any of this then I'd prefer not to load as this takes time and battery current. Please confirm.

    2/ with odr = 50Hz data is ready after 20ms or 60ms - which one ?

    3/ for my FIFO/watermark/interrupt example, and again assuming that watermark level of 600, the device issues an interrupt on int1 when it reaches the 600 level and the microcontroller begins reading FIFO data at this time (but of course there is a small delay before this read can take place), understood. If I don't set BMA4_FIFO_STOP_ON_FULL mode then the device continues filling FIFO upto address 1024 then continues from address 0 and continues this loop forever - is that correct ? In this case, depending on the speed of my reading, it is possible that the data I eventually read may have already been overwritten by the continuous FIFO updates - correct ?

    In my application, however, I do set BMA4_FIFO_STOP_ON_FULL mode, so is it true to say that in this case the device continues filling FIFO upto address 1024 but would stop at that point regardless of when I begin to read the FIFO data ? In this case, regardless of my FIFO reading speed, I am at least guaranteed to read the original 1 - 600 data and this would not have been overwritten - is that correct ?

    BSTRobin
    Community Moderator
    Community Moderator

    Hello TMunb,

    1.It is necessary;
    2. 20ms;
    3.FIFO will always be filled every 20ms. Unless you read data very slowly (usually enough in 20ms), the data you read is 600 bytes. If you read 600 bytes in time, the FIFO length will be reduced by 600 bytes. A normally working code will not be full of FIFO.

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