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About tsg97
since
07-15-2022
07-20-2022
tsg97
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07-20-2022
01:34 PM
Hi BSTRobin, Just to confirm, would reading the interrupt status register clear the latch even if it is not permanently latched but is latched for a specific time duration? For eg, if it was configured to be latched for 80ms(BMI160_LATCH_DUR_80_MILLI_SEC). And the scenario I had described was for a sitatuion where the INT2 pin was already used for a different interrupt, for eg DREADY. So I would still need to switch the interrupt on INT1. Thanks
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07-15-2022
11:41 AM
Hi, Is there a seqeunce of commands to be followed while changing the interrupt assgined to an interrupt channel during runtime without resetting the BMI160? For eg, I have High-G Interrupt configured on the INT-1 pin. When a condition is hit in my code, I would configure Low-G Interrupt to INT-1 pin. Is calling bmi160_set_int_config with the updated bmi160_int_setting structure enough? If I enable a latch on the High-G Interrupt and then configure INT-1 to Low-G interrupt, will the latch be cleared? Is the same behaviour expected for the interrupts on the BMI270? Thanks
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- Tags:
- BMI160
- IMU
- interrupts
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