About rdehart

Hi o_o I used my delay function to toggle a GPO & measure with a scope. My delay function was incorrect. I corrected the delay function and confirmed the GPO toggle. Tested the MAG output data again and I am getting this result: 1 measurements with sensible data, then no change. What is interesting is that the ACC data is still responding as expected. It seems that the issue is isolated to the BMM150 part of the BMX160 sensor only. I wanted to check if there was some hidden info in the BMM150's register data to give a clue as to what if happening. I read & print the BMM150 registers before every ACC & MAG data is read. What I saw does not make sense to me. It appears that on the first read of MAG data no longer gives valid data. Here are some of my observations from the BMM150 register printouts: Power Control Bit turns on & off between some reads Self Test turns on & off between some reads Opmode settings fluctuate between some reads (NORMAL & SLEEP modes). FORCED mode, is never detected, eventhough it is setup as such REPXY changes between some reads REPZ changes between some reads   Just to check I am not misunderstanding, can the BMM150 registers be read at any time?   Just to ensure there isn't something weird with my setup, here is the I2C trace of my latest test setup   BMX160 init: IC2_R: add:68 reg:00 len:01 data: d8 IC2_W: add:68 reg:7e data:b6 bmi160_init:0 IC2_R: add:68 reg:00 len:01 data: d8 chipID:d8 IC2_W: add:68 reg:7e data:19 IC2_R: add:68 reg:6b len:01 data: 00 IC2_W: add:68 reg:6b data:20 IC2_R: add:68 reg:4c len:01 data: 80 IC2_W: add:68 reg:4b data:20 IC2_W: add:68 reg:4c data:83 bmi160_aux_init:0 IC2_W: add:68 reg:4d data:4b IC2_R: add:68 reg:04 len:08 data: 01 06 3f 07 00 00 07 1a IC2_W: add:68 reg:4f data:01 IC2_W: add:68 reg:4e data:4b IC2_W: add:68 reg:4d data:40 IC2_R: add:68 reg:04 len:08 data: 32 05 11 01 79 00 db ff IC2_W: add:68 reg:4d data:5d IC2_R: add:68 reg:04 len:08 data: 00 00 00 50 84 00 00 1e IC2_W: add:68 reg:4d data:62 IC2_R: add:68 reg:04 len:08 data: 00 00 1e 1e 03 00 f2 02 IC2_W: add:68 reg:4d data:68 IC2_R: add:68 reg:04 len:08 data: f2 02 58 56 cd 1a 00 00 IC2_W: add:68 reg:4d data:70 IC2_R: add:68 reg:04 len:08 data: fd 1d ff ff ff ff ff ff bmm150_init:0 IC2_W: add:68 reg:4d data:40 IC2_R: add:68 reg:04 len:08 data: 32 05 11 01 79 00 db ff BmmID:32 IC2_R: add:68 reg:40 len:02 data: 28 03 IC2_W: add:68 reg:40 data:27 IC2_W: add:68 reg:41 data:05 IC2_R: add:68 reg:42 len:02 data: 28 00 IC2_W: add:68 reg:42 data:27 IC2_W: add:68 reg:43 data:04 IC2_R: add:68 reg:40 len:01 data: 27 IC2_W: add:68 reg:7e data:11 IC2_R: add:68 reg:02 len:01 data: 80 bmi160_set_sens_conf:0 IC2_W: add:68 reg:4d data:4c IC2_R: add:68 reg:04 len:08 data: 06 3f 07 00 00 07 1a ff IC2_W: add:68 reg:4f data:06 IC2_W: add:68 reg:4e data:4c IC2_W: add:68 reg:4f data:07 IC2_W: add:68 reg:4e data:51 IC2_W: add:68 reg:4f data:1a IC2_W: add:68 reg:4e data:52 bmm150_set_presetmode:0 IC2_W: add:68 reg:4d data:4c IC2_R: add:68 reg:04 len:08 data: 06 3f 07 00 00 07 1a ff IC2_W: add:68 reg:4f data:02 IC2_W: add:68 reg:4e data:4c bmm150_set_op_mode:0 IC2_W: add:68 reg:4d data:42 IC2_R: add:68 reg:44 len:01 data: 0b IC2_W: add:68 reg:44 data:07 IC2_R: add:68 reg:4c len:01 data: 83 IC2_W: add:68 reg:4b data:20 IC2_W: add:68 reg:4c data:03 bmi160_config_aux_mode:0     Here are the consequcitve BMM150 register reads ( followed by ACC & MAG data read) Read #1(Power Control Bit=1, Self Test=1, Opmode=Normal):   BmmReg: IC2_W: add:68 reg:4d data:4a IC2_R: add:68 reg:04 len:08 data: 00 01 06 3f 07 00 00 07 4a: 00 IC2_W: add:68 reg:4d data:4b IC2_R: add:68 reg:04 len:08 data: 01 06 3f 07 00 00 07 1a 4b: 01 IC2_W: add:68 reg:4d data:4c IC2_R: add:68 reg:04 len:08 data: 01 06 3f 07 00 00 07 1a 4c: 01 IC2_W: add:68 reg:4d data:4d IC2_R: add:68 reg:04 len:08 data: 3f 07 00 00 07 1a ff 00 4d: 3f IC2_W: add:68 reg:4d data:4e IC2_R: add:68 reg:04 len:08 data: 3f 07 00 00 07 1a ff 00 4e: 3f IC2_W: add:68 reg:4d data:4f IC2_R: add:68 reg:04 len:08 data: 00 00 07 1a ff 00 1f b4 4f: 00 IC2_W: add:68 reg:4d data:50 IC2_R: add:68 reg:04 len:08 data: 00 07 1a ff 00 1f b4 43 50: 00 IC2_W: add:68 reg:4d data:51 IC2_R: add:68 reg:04 len:08 data: 00 07 1a ff 00 1f b4 43 51: 00 IC2_W: add:68 reg:4d data:52 IC2_R: add:68 reg:04 len:08 data: 1a ff 00 1f b4 43 00 98 52: 1a IC2_R: add:68 reg:12 len:06 data: 0f 1c 71 0f 00 fe IC2_R: add:68 reg:04 len:08 data: 1a ff 00 1f b4 43 00 98 aX=-0.06,aY=0.48,aZ=-0.88 mX=-10.000000,mY=355.000000,mZ=2047.000000     Read #2(Power Control Bit=0, Self Test=0, Opmode=Sleep):   BmmReg: IC2_W: add:68 reg:4d data:4a IC2_R: add:68 reg:04 len:08 data: 00 01 06 3f 07 00 00 07 4a: 00 IC2_W: add:68 reg:4d data:4b IC2_R: add:68 reg:04 len:08 data: 00 01 06 3f 07 00 00 07 4b: 00 IC2_W: add:68 reg:4d data:4c IC2_R: add:68 reg:04 len:08 data: 06 3f 07 00 00 07 1a ff 4c: 06 IC2_W: add:68 reg:4d data:4d IC2_R: add:68 reg:04 len:08 data: 3f 07 00 00 07 1a ff 00 4d: 3f IC2_W: add:68 reg:4d data:4e IC2_R: add:68 reg:04 len:08 data: 3f 07 00 00 07 1a ff 00 4e: 3f IC2_W: add:68 reg:4d data:4f IC2_R: add:68 reg:04 len:08 data: 00 00 07 1a ff 00 1f b4 4f: 00 IC2_W: add:68 reg:4d data:50 IC2_R: add:68 reg:04 len:08 data: 00 00 07 1a ff 00 1f b4 50: 00 IC2_W: add:68 reg:4d data:51 IC2_R: add:68 reg:04 len:08 data: 07 1a ff 00 1f b4 43 00 51: 07 IC2_W: add:68 reg:4d data:52 IC2_R: add:68 reg:04 len:08 data: 1a ff 00 1f b4 43 00 98 52: 1a IC2_R: add:68 reg:12 len:06 data: 1b 1c 81 0f 03 fe IC2_R: add:68 reg:04 len:08 data: 1a ff 00 1f b4 43 00 98 aX=-0.06,aY=0.48,aZ=-0.88 mX=-10.000000,mY=355.000000,mZ=2047.000000     Read #3(Power Control Bit=0, Self Test=0, Opmode=Normal):   BmmReg: IC2_W: add:68 reg:4d data:4a IC2_R: add:68 reg:04 len:08 data: 00 01 06 3f 07 00 00 07 4a: 00 IC2_W: add:68 reg:4d data:4b IC2_R: add:68 reg:04 len:08 data: 00 01 06 3f 07 00 00 07 4b: 00 IC2_W: add:68 reg:4d data:4c IC2_R: add:68 reg:04 len:08 data: 06 3f 07 00 00 07 1a ff 4c: 06 IC2_W: add:68 reg:4d data:4d IC2_R: add:68 reg:04 len:08 data: 06 3f 07 00 00 07 1a ff 4d: 06 IC2_W: add:68 reg:4d data:4e IC2_R: add:68 reg:04 len:08 data: 07 00 00 07 1a ff 00 1f 4e: 07 IC2_W: add:68 reg:4d data:4f IC2_R: add:68 reg:04 len:08 data: 00 00 07 1a ff 00 1f b4 4f: 00 IC2_W: add:68 reg:4d data:50 IC2_R: add:68 reg:04 len:08 data: 00 00 07 1a ff 00 1f b4 50: 00 IC2_W: add:68 reg:4d data:51 IC2_R: add:68 reg:04 len:08 data: 07 1a ff 00 1f b4 43 00 51: 07 IC2_W: add:68 reg:4d data:52 IC2_R: add:68 reg:04 len:08 data: 1a ff 00 1f b4 43 00 98 52: 1a IC2_R: add:68 reg:12 len:06 data: 17 1c 7d 0f 0b fe IC2_R: add:68 reg:04 len:08 data: 1a ff 00 1f b4 43 00 98 aX=-0.06,aY=0.48,aZ=-0.88 mX=-10.000000,mY=355.000000,mZ=2047.000000     I have attached a text file (BMM150_Register_Traces.h) that contains the Setup & BMM150 register traces of  multiple consecutive reads. Each read is done at approx. 1second intervals (no intermediate reads eventhough output rate is set to 50Hz). I ran the test code on 2 different PCB's to eliminate the posibility of a hardware fault. Both boards give the same type of result (BMM150 registers changing between reads). Is there a posibility of a hardware failure on both boards? Is there other information I can provide that will give more insight?   ... View more

Hi o_o Thanks for highlighting this incorrect write regiter. My burst write function was not incrementing the regiter. I've fixed this and can confirm that the init I2C write traces are identical to yours. I changed my code to poll the drdy_acc and drdy_mag bits (currently at 1sec intervals). Both are set correctly. When I read the ACC and MAG data, the ACC data changes as expected. The MAG data only updates correctly for 2 read cycles. After that the data goes to some bogus value and doesn't change. I've outputted the BMM150 registers. Here are the I2C traces and register outputs when reading the registers: // BMM150 Registers READ [REG: DATA] // Read Reg: 0x4A IC2_W: add:68 reg:4d data:4a IC2_R: add:68 reg:04 len:08 data: c9 00 69 00 af 00 4d 69 4a: c9 // Read Reg: 0x4B & 0x4C IC2_W: add:68 reg:4d data:4b IC2_R: add:68 reg:04 len:08 data: 00 01 06 3f 07 00 00 07 4b: 00 4c: 01 // Read Reg: 0x4D - 0x50 IC2_W: add:68 reg:4d data:4d IC2_R: add:68 reg:04 len:08 data: 01 06 3f 07 00 00 07 1a 4d: 01 4e: 06 4f: 3f 50: 07 // Read Reg: 0x51 & 0x52 IC2_W: add:68 reg:4d data:51 IC2_R: add:68 reg:04 len:08 data: 3f 07 00 00 07 1a ff 00 51: 3f 52: 07   Any thoughts on why the MAG data is only valid for 2 read cycles? ... View more

Hi o_o I have attached the schematic of my BMX160 sensor routing  (BMX160_schematic.png). Unfortunately I don't have a logic analyzer, but I have put a printout in the low-level I2C read & write functions. The READ function is a block operation and prints out "IC2_R" with all the data read following (address, register, length & data read). The WRITE function is a "single char at a time" operation and prints out "IC2_W" with all the write data following (I2C address, register, data to written) The order and contents of operation remains unchanged. Below is the printout with the I2C trace enabled, during BMX160 init. Each block starts with a description (not really in the code), the I2C write/read operation traces and the return value. BMX160 init: Fucntion call I2C Write & Read data: bmi160_init IC2_R: add:68 reg:00 len:01 data: d8 IC2_W: add:68 reg:7e data:b6 (return value of) bmi160_init:0 Read BMX160 ChipID IC2_R: add:68 reg:00 len:01 data: d8 chipID:d8 Fucntion call I2C Write & Read data: bmi160_aux_init IC2_W: add:68 reg:7e data:19 IC2_R: add:68 reg:6b len:01 data: 00 IC2_W: add:68 reg:6b data:20 IC2_R: add:68 reg:4c len:01 data: 80 IC2_W: add:68 reg:4b data:20 IC2_W: add:68 reg:4c data:80 (return value of) bmi160_aux_init:0 Fucntion call I2C Write & Read data: bmm150_init IC2_W: add:68 reg:4d data:4b IC2_R: add:68 reg:04 len:01 data: 03 IC2_W: add:68 reg:4f data:03 IC2_W: add:68 reg:4e data:4b IC2_W: add:68 reg:4d data:40 IC2_R: add:68 reg:04 len:01 data: 32 IC2_W: add:68 reg:4d data:5d IC2_R: add:68 reg:04 len:01 data: 00 IC2_W: add:68 reg:4d data:5e IC2_R: add:68 reg:04 len:01 data: 00 IC2_W: add:68 reg:4d data:62 IC2_R: add:68 reg:04 len:01 data: 00 IC2_W: add:68 reg:4d data:63 IC2_R: add:68 reg:04 len:01 data: 00 IC2_W: add:68 reg:4d data:64 IC2_R: add:68 reg:04 len:01 data: 1e IC2_W: add:68 reg:4d data:65 IC2_R: add:68 reg:04 len:01 data: 1e IC2_W: add:68 reg:4d data:68 IC2_R: add:68 reg:04 len:01 data: f2 IC2_W: add:68 reg:4d data:69 IC2_R: add:68 reg:04 len:01 data: 02 IC2_W: add:68 reg:4d data:6a IC2_R: add:68 reg:04 len:01 data: 58 IC2_W: add:68 reg:4d data:6b IC2_R: add:68 reg:04 len:01 data: 56 IC2_W: add:68 reg:4d data:6c IC2_R: add:68 reg:04 len:01 data: cd IC2_W: add:68 reg:4d data:6d IC2_R: add:68 reg:04 len:01 data: 1a IC2_W: add:68 reg:4d data:6e IC2_R: add:68 reg:04 len:01 data: 00 IC2_W: add:68 reg:4d data:6f IC2_R: add:68 reg:04 len:01 data: 00 IC2_W: add:68 reg:4d data:70 IC2_R: add:68 reg:04 len:01 data: fd IC2_W: add:68 reg:4d data:71 IC2_R: add:68 reg:04 len:01 data: 1d (return value of) bmm150_init:0 Read BMM150 ChipID IC2_W: add:68 reg:4d data:40 IC2_R: add:68 reg:04 len:01 data: 32 BmmID:32 Fucntion call I2C Write & Read data: bmi160_set_sens_conf IC2_R: add:68 reg:40 len:02 data: 28 03 IC2_W: add:68 reg:40 data:27 IC2_W: add:68 reg:41 data:05 IC2_R: add:68 reg:42 len:02 data: 28 00 IC2_W: add:68 reg:42 data:27 IC2_W: add:68 reg:43 data:04 IC2_R: add:68 reg:40 len:01 data: 27 IC2_W: add:68 reg:7e data:11 IC2_R: add:68 reg:02 len:01 data: 80 (return value of) bmi160_set_sens_conf:0 Fucntion call I2C Write & Read data: bmm150_set_presetmode IC2_W: add:68 reg:4d data:4c IC2_R: add:68 reg:04 len:01 data: 06 IC2_W: add:68 reg:4f data:06 IC2_W: add:68 reg:4e data:4c IC2_W: add:68 reg:4f data:07 IC2_W: add:68 reg:4e data:51 IC2_W: add:68 reg:4f data:1a IC2_W: add:68 reg:4e data:52 (return value of) bmm150_set_presetmode:0 Fucntion call I2C Write & Read data: bmm150_set_op_mode IC2_W: add:68 reg:4d data:4c IC2_R: add:68 reg:04 len:01 data: 06 IC2_W: add:68 reg:4f data:02 IC2_W: add:68 reg:4e data:4c (return value of) bmm150_set_op_mode:0 Fucntion call I2C Write & Read data: bmi160_config_aux_mode IC2_W: add:68 reg:4d data:42 IC2_R: add:68 reg:44 len:01 data: 0b IC2_W: add:68 reg:44 data:07 IC2_R: add:68 reg:4c len:01 data: 80 IC2_W: add:68 reg:4b data:20 IC2_W: add:68 reg:4b data:00 (return value of) bmi160_config_aux_mode:0   Then I used the bmm150_aux_read wrapper function to read the registers from the BMM150. Here is the function I have implemented: /*wrapper function to match the signature of bmm150.read */ int8_t bmm150_aux_read(uint8_t id, uint8_t reg_addr, uint8_t *reg_data, uint16_t len) { /* Discarding the parameter id as it is redundant*/ return bmi160_aux_read(reg_addr, reg_data, len, &bmi); }   I then printed out the BMX160 (BMI160 & BMM150) registers after 1 second of operation. NOTE: no drdy or data reads have been performed by this stage. Read BMX160/BMI160 registers (REG: DATA) 00: d8 01: 21 02: 80 03: 11 1c: 00 1d: 00 1e: 00 1f: 00 40: 27 41: 05 42: 27 43: 04 44: 07 50: 00 51: 00 52: 00 53: 00 54: 00 55: 00 56: 00 57: 00 58: 00 59: 00 63: 04 64: 0a Read BMM150 registers (REG: DATA) 4a: 01 4b: 01 4c: 01 4d: 01 4e: 01 4f: 01 50: 01 51: 01 52: 01   Do these I2C traces & registers look correct? (the BMM150 registers don't seem to change. Am I using the bmm150_aux_read function directly, with the assumption that I can use it to "directly" read the BMM150 registers. Is this wrong?) Please let me know your thoughts. Thanks   ... View more

Some hardware feedback. I have two boards. The first board I reduced the pull-up resistors on the SCX & SDX to get faster I2C speeds. Throught that I may have damaged the BMX160 due to too low pull-up resistors. To confirm I tested the same code on the second board. When testing with the second board, I had the same result as in my previous post. I have compared my PCB design to the examples and all is equivalent.  VDD = VDDIO = 3.3V Since @handytech was able to get his BMX160 working with equivalent code, is there an external pin on the BMX160 that is only connected to the internal MAG sensor? Is there any hardware reason why the ACC & GYRO would operate as expected, but the MAG sensor does not? ... View more